The invention relates to a method for producing an electric functional layer on a surface of a substrate, on which at least one component, in particular a semiconductor chip, is arranged.
The starting point for the production of an electronic module is a semi-finished product with a substrate to which a structured metal layer with metal or contact surfaces is applied. Some of the contact surfaces feature one or several components, for example a semiconductor chip or a passive component. The component or components is or are connected to the respective contact surface by an adhesive agent, usually solder. If one of the components exhibits a rear-side contact, i.e. a contact facing towards the substrate, the adhesive agent creates not only a mechanical and but also an electrical connection to the respective contact surface.
For electrical contacting some of the components exhibit a number of contact surfaces on their top side facing away from the substrate. The electrical connection between the contact surfaces themselves and/or one of the contact surfaces of the metal layer is usually formed by using bond wires.
Alternatively, the electrical connections between the contact surfaces of the components and/or a contact surface of the metal layer can be produced by planar connection technology, in which a surface of the semi-finished product is initially covered with an insulation layer, for example a plastic foil of an insulating material. At the locations of the contact surfaces openings are inserted in the insulation layer so that the contact surfaces are not covered. Subsequently a thin metal layer is applied by sputtering, vapor deposition or other methods to produce thin contact layers over the entire surface of the insulation layer and the inserted openings. The sputter layer is for example an approx. 50-nm layer of titanium and an approx 1-μm layer of copper. Onto this sputter layer a light-sensitive foil (photo foil), usually an insulating material, is applied. The thickness of the photo foil is between 20 and 200 μm and in a further step it is exposed and developed according to the desired conductive structure.
Exposure usually takes place using a mask with which the layout of the conductive structure is transferred to the photo foil. The sections of the photo foil intended to form the later electrically conductive structure or functional layer are shaded by the mask. The non-exposed sections of the photo foil can be removed in a further step to reveal the sputter layer, or more precisely the copper surface, underneath. By immersing the prepared semi-finished product in an electrolyte bath, in particular a copper electrolyte bath, a copper layer with a thickness of approx. 20 to 200 μm is produced by galvanic growth. In a next step, referred to as stripping the photo foil, the photo foil still on the surface is removed in the places where no electrically conductive structure is required. In a final step, referred to as differential etching, the sputter layer of titanium and copper is removed from the entire surface so that only the desired conductive structure or functional layer remains.
If the components are configured as power semiconductor components the conductive structure or functional layer is usually made of copper. The required layer thickness ranges from 20 to 500 μm.
Planar connection technology has the advantage that the electronic module produced is much lower in height than electronic modules which have conventional wires. Owing to the numerous steps required, however, this connection technology entails higher costs.